1. Field of the Invention
This invention generally relates to methods and systems for context-based inspection for dark field inspection.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Wafer inspection, using either optical or electron beam technologies, is an important technique for debugging semiconductor manufacturing processes, monitoring process variations, and improving production yield in the semiconductor industry. With the ever decreasing scale of modern integrated circuits (ICs) as well as the increasing complexity of the manufacturing process, inspection becomes more and more difficult.
In each processing step performed on a semiconductor wafer, the same circuit pattern is printed in each die on the wafer. Most wafer inspection systems take advantage of this fact and use a relatively simple die-to-die comparison to detect defects on the wafer. However, the printed circuit in each die may include many areas of patterned features that repeat in the x or y direction such as the areas of DRAM, SRAM, or FLASH. This type of area is commonly referred to as an array area (the rest of the areas are called random or logic areas). To achieve better sensitivity, advanced inspection systems employ different strategies for inspecting the array areas and the random or logic areas.
Context-based inspection (CBI) was previously invented for bright field (BF) inspection systems. To ensure that the micro care areas (MCAs or hot spots that are high potential defect areas) will be accurately overlaid on the inspection optics image frames, patch to design alignment (PDA) is performed. PDA generally includes setup and runtime steps. At setup, a set of “best patterns” are selected from each optical swath image and then they are used to correlate with the corresponding design clips to acquire the shift between the optical images and corresponding design. These optics image patches and corresponding design clips are saved in the inspection recipe. At inspection time, the selected optical image patches are correlated to the corresponding run time patches to figure out the shift between the optics image patches at setup time and run time. Then, the shift between the optics patch and design clip at setup time will be further applied to figure out the shift between design and wafer images at run time so that design-based MCAs are correctly applied to the inspection image patches.
The methods described above were designed for BF inspection systems that have the following characteristics that enable wafer die coordinate accuracies that render the systems suitable for the above-described methods. For example, BF systems typically have a dedicated run time alignment (RTA) image computer that performs the RTA among dies. In addition, the BF inspection systems typically have a dedicated premap swath to ensure that the pixel coordinates of corresponding pixels in different dies are relatively accurate. This way, as long as the relative shift between design clip and optics image on a selected die is determined, the same shift can be applied to all other die with confidence. Unfortunately, this kind of die coordinate accuracy cannot be achieved in some inspection systems such as some laser scanning inspection systems. Therefore, although the CBI described above has provided significant benefits for inspection systems having such configurations, such inspection cannot necessarily be performed on inspection systems that are not capable of the wafer die coordinate accuracies described above.
Accordingly, it would be advantageous to develop methods and systems for wafer inspection that do not have one or more of the disadvantages described above.